Publications & Works

Published journal articles indexed by SCI, SSCI, and AHCI

Articles Published in Other Journals

Refereed Congress / Symposium Publications in Proceedings

Towards QoS-Aware Resource Allocation in Fog Computing: A Theoretical Model

2022 International Symposium on Networks, Computers and Communications, ISNCC 2022, Shenzhen, China, 19 - 21 July 2022 identifier

Q-Learning-based Routing Algorithm for 3D Network-on-Chips

24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), ELECTR NETWORK, 7 - 09 April 2021, pp.33-36 identifier identifier

Number Analysis and Operator Detection in Telecommunication Systems

International Symposium on Networks, Computers and Communications (ISNCC), İstanbul, Turkey, 18 - 20 June 2019 identifier identifier

A Distant Augmented Reality System for Cultural Heritage Sites using Drones

3rd Global Summit and Expo on Multimedia and Artificial Intelligence, 20 - 21 July 2017

Energy-Aware Application-Specific Topology Generation for 3D Network-on-Chips

2017 20TH IEEE INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUIT SYSTEMS (DDECS), Dresden, Germany, 19 - 21 April 2017, pp.84-87 identifier identifier

Improving Combinational Circuit Resilience against Soft Errors via Selective Resource Allocation

2017 20TH IEEE INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUIT SYSTEMS (DDECS), Dresden, Germany, 19 - 21 April 2017, pp.12-15 identifier identifier

FPGA implementation of a fault-tolerant application-specific NoC design

11th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016, İstanbul, Turkey, 12 - 14 April 2016 Creative Commons License identifier

Moving object detection by a mounted moving camera

International Conference on Computer as a Tool, IEEE EUROCON 2015, Salamanca, Spain, 8 - 11 September 2015 identifier

Moving Object Detection by a Mounted Moving Camera

International Conference on Computer as a Tool (EUROCON), IEEE, Salamanca, Mexico, 8 - 11 September 2015, pp.334-339 identifier identifier

Fault-Tolerant Irregular Topology Design Method for Network-on-Chips

17th Euromicro Conference on Digital System Design (DSD), Verona, Italy, 27 - 29 August 2014, pp.631-634 Creative Commons License Sustainable Development identifier identifier

Fault-Tolerant Routing for Irregular-Topology-based Network-on-Chips

International Symposium on Computing and Networking CANDAR, Shizuoka, Japan, 10 - 12 December 2014, pp.123-129 Sustainable Development identifier identifier

Power-aware topology generation for application specific NoC design

2012 6th International Conference on Application of Information and Communication Technologies, AICT 2012, Tbilisi, Georgia, 17 - 19 October 2012 identifier

Genetic algorithm based NoC design with voltage/frequency islands

2011 5th International Conference on Application of Information and Communication Technologies, AICT 2011, Baku, Azerbaijan, 12 - 14 October 2011 identifier

TopGen: A new algorithm for automatic topology generation for network on chip architectures to reduce power consumption

2009 International Conference on Application of Information and Communication Technologies, AICT 2009, Baku, Azerbaijan, 14 - 16 October 2009 identifier

An ILP formulation for application mapping onto Network-on-Chips

2009 International Conference on Application of Information and Communication Technologies, AICT 2009, Baku, Azerbaijan, 14 - 16 October 2009 Creative Commons License identifier

Parallelization of render engine for global illumination of graphics scenes

2009 International Conference on Application of Information and Communication Technologies, AICT 2009, Baku, Azerbaijan, 14 - 16 October 2009 identifier

Foton Haritalama Algoritmasının Evrensel Aydınlatma Amaçlı ParalellestirilmesiParallelization of Photon Mapping Algorithm for Global Illumination

The National Symposium on Electrical-Electronics and Computer Engineering, ELECO 2008, Turkey, 26 - 30 November 2008

Yonga Üstü Heterojen Çok slemciler çin Enerji Verimli s Parçacıgı EslemesiTask Scheduling On Heterogeneous Chip Multiprocessors for Reducing Energy

The National Symposium on Electrical-Electronics and Computer Engineering, ELECO 2008, Turkey, 26 - 30 November 2008

Multi-level on-chip memory hierarchy design for embedded chip multiprocessors

12th International Conference on Parallel and Distributed Systems, ICPADS 2006, Minneapolis, MN, United States Of America, 12 - 15 July 2006, vol.1, pp.383-390 identifier

An ILP Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors

Computer and Information Sciences – ISCIS 2006, 1 - 03 November 2006, vol.4263, pp.267-276 identifier

Reducing memory requirements through task recomputation in embedded multi-CPU systems

IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006, Klarlsruhe, Germany, 2 - 03 March 2006, vol.2006, pp.448-449 identifier

A Novel Essential Prime Implicant Identification Method for Exact Direct Cover Logic Minimization

International Conference on Computer Design & Conference on Computing in Nanotechnology, CDES 2006, 26 - 29 June 2006

Using Task Recomputation During Application Mapping in Parallel Embedded Architectures

International Conference on Computer Design & Conference on Computing in Nanotechnology, CDES 2006, 26 - 29 June 2006

An ILP based approach to address code generation for digital signal processors

Proceedings of the 16th ACM Great Lakes symposium on VLSI - GLSVLSI '06, Philadelphia, PA, USA, 30 April - 01 May 2006 identifier

Reliability-conscious process scheduling under performance constraints in FPGA-based embedded systems

19th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2005, Denver, CO, United States Of America, 4 - 08 April 2005, vol.2005 identifier

On Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression

2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics, Herndon, VA, USA, 19 - 23 September 2005 identifier

Constraint based Code mapping for heterogeneous Chip multiprocessors

2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics, Herndon, VA, USA, 19 - 23 September 2005 identifier

An ILP formulation for reliability-oriented high-level synthesis

6th International Symposium on Quality Electronic Design, San-Jose, Costa Rica, 21 - 23 March 2005, pp.364-369 identifier identifier

Reliability-centric hardware/software co-design

6th International Symposium on Quality Electronic Design, San-Jose, Costa Rica, 21 - 23 March 2005, pp.375-380 identifier identifier

Reliability-centric high-level synthesis

Design, Automation and Test in Europe Conference and Exhibition (DATE 05), Munich, Germany, 7 - 11 March 2005, pp.1258-1263 Creative Commons License identifier identifier

Books & Book Chapters

Enabling Network Security in HPC Systems Using Heterogeneous CMPs

in: High Performance Computing on Complex Environments, Emmanuel Jeannot, Julius Zilinskas, Editor, John Wiley and Sons, pp.383-400, 2014 identifier identifier identifier

Taking Advantage of Heterogeneous Platforms in Image and Video Processing

in: High Performance Computing on Complex Environments, Emmanuel Jeannot, Julius Zilinskas, Editor, John Wiley and Sons, pp.429-450, 2014 identifier identifier identifier

Metrics

Publication

59

Citation (WoS)

324

H-Index (WoS)

12

Citation (Scopus)

453

H-Index (Scopus)

12

Project

9

Thesis Advisory

4

Open Access

9
UN Sustainable Development Goals