IEICE ELECTRONICS EXPRESS, vol.7, no.15, pp.1132-1138, 2010 (SCI-Expanded)
Article / Article
IEICE ELECTRONICS EXPRESS
Science Citation Index Expanded (SCI-EXPANDED), Scopus
Hacettepe University Affiliated:
This work presents a low complexity irregular topology generation algorithm for Netwok-on-Chip (NoC) design flow. The objective of the algorithm is minimizing the energy consumption of the final design. We tested the effectiveness of our algorithm by comparing it with its earlier counterparts on several multimedia applications.