YARAN, T. And TOSUN, S. 2017. Improving Combinational Circuit Resilience against Soft Errors via Selective Resource Allocation. 2017 20TH IEEE INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUIT SYSTEMS (DDECS) , (Dresden, Germany), 12-15.

YARAN, T., & TOSUN, S., (2017). Improving Combinational Circuit Resilience against Soft Errors via Selective Resource Allocation . 2017 20TH IEEE INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUIT SYSTEMS (DDECS) (pp.12-15). Dresden, Germany

YARAN, TTG, And SÜLEYMAN TOSUN. "Improving Combinational Circuit Resilience against Soft Errors via Selective Resource Allocation," 2017 20TH IEEE INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUIT SYSTEMS (DDECS), Dresden, Germany, 2017

YARAN, TTG And TOSUN, SÜLEYMAN. "Improving Combinational Circuit Resilience against Soft Errors via Selective Resource Allocation." 2017 20TH IEEE INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUIT SYSTEMS (DDECS) , Dresden, Germany, pp.12-15, 2017

YARAN, T. And TOSUN, S. (2017) . "Improving Combinational Circuit Resilience against Soft Errors via Selective Resource Allocation." 2017 20TH IEEE INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUIT SYSTEMS (DDECS) , Dresden, Germany, pp.12-15.

@conferencepaper{conferencepaper, author={TTG YARAN And author={SÜLEYMAN TOSUN}, title={Improving Combinational Circuit Resilience against Soft Errors via Selective Resource Allocation}, congress name={2017 20TH IEEE INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUIT SYSTEMS (DDECS)}, city={Dresden}, country={Germany}, year={2017}, pages={12-15} }