TOSUN, S. Et Al. 2003. Deriving Intermediary RTLs for Verification of Pipelined Synthesized Designs. nternational Conference on VLSI (VLSI'03) .

TOSUN, S., KOÇ, H., & MANSOURİ, N., (2003). Deriving Intermediary RTLs for Verification of Pipelined Synthesized Designs . nternational Conference on VLSI (VLSI'03)

TOSUN, SÜLEYMAN, HAKDURAN KOÇ, And NAZANIN MANSOURİ. "Deriving Intermediary RTLs for Verification of Pipelined Synthesized Designs," nternational Conference on VLSI (VLSI'03), 2003

TOSUN, SÜLEYMAN Et Al. "Deriving Intermediary RTLs for Verification of Pipelined Synthesized Designs." nternational Conference on VLSI (VLSI'03) , 2003

TOSUN, S. KOÇ, H. And MANSOURİ, N. (2003) . "Deriving Intermediary RTLs for Verification of Pipelined Synthesized Designs." nternational Conference on VLSI (VLSI'03) .

@conferencepaper{conferencepaper, author={SÜLEYMAN TOSUN Et Al. }, title={Deriving Intermediary RTLs for Verification of Pipelined Synthesized Designs}, congress name={nternational Conference on VLSI (VLSI'03)}, city={}, country={}, year={2003}}