S. TOSUN Et Al. , "Fault-Tolerant Topology Generation Method for Application-Specific Network-on-Chips," IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS , vol.34, no.9, pp.1495-1508, 2015
TOSUN, S. Et Al. 2015. Fault-Tolerant Topology Generation Method for Application-Specific Network-on-Chips. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS , vol.34, no.9 , 1495-1508.
TOSUN, S., Ajabshir, V. B., Mercanoglu, O., & OZTURK, O., (2015). Fault-Tolerant Topology Generation Method for Application-Specific Network-on-Chips. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS , vol.34, no.9, 1495-1508.
TOSUN, SÜLEYMAN Et Al. "Fault-Tolerant Topology Generation Method for Application-Specific Network-on-Chips," IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS , vol.34, no.9, 1495-1508, 2015
TOSUN, SÜLEYMAN Et Al. "Fault-Tolerant Topology Generation Method for Application-Specific Network-on-Chips." IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS , vol.34, no.9, pp.1495-1508, 2015
TOSUN, S. Et Al. (2015) . "Fault-Tolerant Topology Generation Method for Application-Specific Network-on-Chips." IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS , vol.34, no.9, pp.1495-1508.
@article{article, author={SÜLEYMAN TOSUN Et Al. }, title={Fault-Tolerant Topology Generation Method for Application-Specific Network-on-Chips}, journal={IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS}, year=2015, pages={1495-1508} }